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Where there is movement, there is static electricity!

Release date:2018-06-25

How is ESD generated?


(1) friction, peeling and electrification

(2) inductive power on

Induction electrification is the redistribution of electric charge of an object under the action of electrostatic field. For example, when a device is powered on, a certain electromagnetic field is generated, and the peripheral objects will induce part of the electric charge under the action of the field, such as the charged phenomenon on the screen of the display. The capacitive electrification is more complex, because the charged body with certain charge is close to and separated from another body. According to the parallel plate capacitance formula C = ε s / 4 π KD (s is the positive area of the metal sheet, D is the distance between the two metal sheets). The capacitance of the system changes. From q = CV (C is capacitance, V is voltage), it can be seen that the electrostatic potential of the object or human body carrying a certain amount of electricity will change, which will lead to the damage of microelectronic devices such as integrated block.

The process of electrifying a conductor by using the principle of electrostatic induction. Ball a is not charged originally. Charged ball B makes ball a charge transfer. In case of grounding, ball a is charged by C, e, F and other processes, which is called induction electrification.

(3) change of capacitance

lV=Q/C;lC=εA/d

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Characteristics of ESD

(1) the dry environment is more prone to generate static electricity:

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(2) human perception of static electricity:

At 3KV, you can feel through the skin;

At 5kV, you can hear;

At 10kV, you can see;

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(3) characteristics of electrostatic discharge:

High potential: hundreds to thousands of volts, even tens of thousands to hundreds of thousands of volts; (human body is not easy to feel the static electricity below 3KV)

Low power: most of the static electricity is of microampere level (except for the instantaneous discharge at the tip)

Short discharge time: generally delicate; a ESD transient induced current can reach its peak value in less than 1 ns (according to IEC 61000-4-2 standard)

Greatly affected by the environment: especially humidity; when humidity rises, electrostatic accumulation decreases and static voltage decreases.

Hazards of ESD

ESD failure: simulate 8Kv electrostatic discharge of human body belt, discharge 3 times; amplify 3000 times.

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Hard damage and soft damage

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Human body static electricity can destroy any common semiconductor device. (in the past, when the lab found that someone was holding the board naked, it sent a broken board for him to repair.)

Control ESD:

Static electricity cannot be eliminated, it can only be controlled.

Methods of ESD control:

Blocking;

Protect the mechanism from static electricity. Seal the PCB board in the shell with insulating materials. No matter how much static electricity there is, it cannot be released to the PCB.

Guide;

With ESD, static electricity can be transferred to the main GND of PCB quickly, which can eliminate some static electricity.

Block and guide of complete machine level

1. Shell and decorative parts: metal and conductive electroplating materials, which are easy to attract and gather static electricity; these materials should be avoided as far as possible for projects with high ESD requirements.

2. When conductor materials must be used: effective and evenly distributed grounding points shall be reserved in advance in the structure; generally speaking, the grounding effect of thimble or metal spring is better than that of conductive foam and conductive cloth.

3. For those that cannot be grounded, such as electroplating side key, special treatment shall be focused on the main board. Including (1) adding varistor, TVs or capacitor and other devices;

(2) reserve GND pin;

(3) the edge of the plate is exposed with copper to attract electrostatic discharge;

4. The distance between the metal parts on the shell and the devices and wiring must be more than 2.2mm.

5. Avoid exposing the device on the hole and seam edge on the stack; if it cannot be avoided, try to block it in the assembly; the common method is to paste high temperature tape or anti-static tape and other barriers; all structural design needs to leave space for increasing the isolation piece.

Board level blocking and conduction

1. Increase the area of PCB to increase GND area and enhance its ability of neutralizing static electricity; let's make the cost or differential stacking smaller.

2. For a really small board, it must have at least one complete GND layer; and it must be able to keep good connection with the battery foundation; we often cannot leave a complete layer because of the cost.

3. For a very small circuit board, due to the limited neutralization capacity of the circuit board, it is necessary to consider more blocking from the whole machine and less conduction.

4. In terms of device selection, the device with high ESD resistance shall be selected; when selecting the electrostatic protection device, its capacity shall be considered to avoid the failure of the signal itself of the protected signal line caused by improper capacity.

5. When the devices are placed, the devices that are easy to be affected by ESD shall be covered in the shield as much as possible.

6. The shield must be effectively and evenly grounded! It shall be directly connected to the main ground, the blind hole shall be directly connected to the buried hole, and the ground shall be evenly distributed around.

7. Electrostatic protection devices must be added to the circuits easy to be exposed such as IO port and keyboard.

8. For the placement of devices, the principle of nearby release must be followed. ESD protection devices should be placed close to IO and side keys. Next, they should be placed across the middle road to avoid being placed close to the chip. This can reduce the transient coupling of ESD pulse signal entering the nearby circuit. Although there is no direct connection, this secondary radiation effect will also make other parts work disorderly.

9. Layout routing must comply with the principle of effective protection; routing should go from the interface to TVs, and then to CPU and other chips; electrostatic protection devices "hanging" far away from the signal line will cause protection failure due to excessive parasitic inductance of the lead wire, making the protection virtual.

10. The connection between the grounding base of TVs pipe and the main ground must be as short as possible to reduce the parasitic inductance of the grounding plane.

11. TVs devices should be as close to the connector as possible to reduce transient coupling into nearby lines. Although there is no direct path to the connector, this secondary radiation effect will also cause other parts of the circuit board to work disorderly.

12. Avoid running important signal lines at the edge of the board, such as clock and reset signal.

13. The unused places on the main board shall be paved as much as possible; and they shall be connected to the main ground; multi paving reduces the distance between the signal and the ground, which is equivalent to reducing the loop area of the signal. (the larger the area is, the greater the field flow it contains, and the greater the induced current.)

14. It should be noted that the direct discharge of ESD to the formation may damage the sensitive circuit. When TVS diode is used, one or more high frequency bypass capacitors shall be used. These capacitors shall be placed between the power supply of vulnerable components and the ground. The bypass capacitor reduces the charge injection and keeps the voltage difference between the power supply and the grounding port.

15. The power supply is better in the middle of the main board than at the edge of the board; the ground layout is better in the middle of the board than at the edge of the board.


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